3-D Grid Voxel Life

Cellular Automata

Life in three dimensions: a life-like cellular automaton living in a true uint8 grid[6][6][6] array, tumbling as a depth-shaded voxel cube. Every grid[z][y][x] makes the compiler generate the plane-and-row stride math — the thing this demo is really testing — while the automaton breathes and shifts on a Super Nintendo. All integer, so it's bit-exact. Runs on its own; no joypad needed. Written in C and compiled with the llvm-mos-based 65816 toolchain (+mos-a16, 16-bit accumulator mode).

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Self-running demo — a 3-D automaton tumbles as a voxel cube.

Click the screen to focus, then watch. Tab away and it pauses.

What it is

Each generation, every cell counts its 26 neighbours in the 3-D grid and lives or dies by the rule; the surviving cells are projected and drawn as a rotating cube:

uint8_t grid[6][6][6];        // a true 3-D array
next = grid[z][y][x];         // compiler emits z*36 + y*6 + x
count = sum of the 26 Moore neighbours (wrapped);
alive ? survive(4..7) : born(5..6);

The point is the grid[z][y][x] access itself — a true multi-dimensional array where the compiler must emit the stride arithmetic, done tens of thousands of times per step and identical across every codegen mode.

Compiler stress-test

ItemWhat it exercises
true 3-D arrayThis is not a flat buffer with hand-written y*W + x offsets — it is a genuine grid[6][6][6], so every grid[z][y][x] makes the compiler generate the plane and row stride arithmetic z*36 + y*6 + x. With a non-power-of-2 side, those strides are real math, not shifts.
26 reads per cellThe automaton counts all 26 Moore neighbours of every cell each step, so the multi-dimensional index is exercised tens of thousands of times per generation — a heavy workout for the compiler's N-dimensional address lowering.
3-D cellular automatonA life-like rule (survive with 4..7 neighbours, born with 5..6) run in three dimensions instead of two. It settles into a shifting, breathing voxel structure rather than dying or filling.
integer, bit-exactCells are bytes and the indexing is integer, so the automaton evolves identically on the host and the 65816 — the build gate folds every cell of every generation and asserts a match to the bit.

Written in C with the llvm-mos 65816 toolchain and verified against bsnes-jg (and MAME where the SPC700 IPL is present). Hit Verify fidelity to reproduce the build gate's WRAM assert (gate CRC 0xFCDE — a fold of every cell of three automaton generations) live in this tab. No far pointers — the same source passes every way: host == default == +mos-a16 == +mos-xy16 == bsnes-jg, -verify clean.