Mid-Bracket NMI Tunnel
Signals & AudioA vertical NMI needle repeatedly slices through long 16-bit arithmetic regions, checking that every interrupt returns with the mainline width state intact.
Self-running — verified CRC 1014 after 1,024 NMIs.
Click the screen, then play. (Tab away and it pauses.)
The asynchronous seam
The main loop executes paired, dense 16-bit arithmetic tunnels from the same volatile seed. NMI can land at any instruction within either call. A correct interrupt envelope restores the hardware-stacked M/X flags and both calls agree; a bad return width corrupts the next native operation, increments the mismatch count, or prevents the gate from publishing.
Disassembly: the ISR has the 65816 outer rep/sep envelope with accumulator and index saves/restores, while the tunnel contains native-width brackets.
Result: host, default, a16, and xy16 all return 0x1014 on MAME; every mode is also byte-identical across three bsnes-jg runs.
What the tunnel shows
Alternating blue and magenta blocks are the long native-width operation stream. During the 17-second gate, NMI ####/1024 and a gold 16-segment progress rail advance live, while ERR 0000 and the cyan integrity rail expose any paired-computation mismatch immediately. The bright NMI needle sweeps through the tunnel, and every element is derived from live test state.
Compiler stress-test #124, Round 7, and the adversarial sibling of VBlank Interrupt Tally.